Recognition of Hand-Sketched Digital Logic Gates

Abstract

Hand-Sketched circuit recognition is a very useful tool in engineering area. Because most of the engineers prefer to design their circuits on the paper firstly. So, this can cause time wasting and some mistakes. In this study, which is based on the solving these kinds of problems, classification and recognition of the handwritten digital logic gates according to their complex and scalar FDs (Fourier Descriptors) is presented. Test results are obtained as 84.3 % accuracy rate for complex FDs, 98.6 % for scalar FDs. Then these results are compared and decided the optimum FDs type for this study.