Recognition of Hand-Sketched Digital Logic Gates
| dc.contributor.author | Gul, Nuray | |
| dc.contributor.author | Tora, Hakan | |
| dc.contributor.other | Airframe and Powerplant Maintenance | |
| dc.date.accessioned | 2024-10-06T10:59:48Z | |
| dc.date.available | 2024-10-06T10:59:48Z | |
| dc.date.issued | 2015 | |
| dc.department | Atılım University | en_US |
| dc.department-temp | [Gul, Nuray; Tora, Hakan] Atilim Univ, Elekt Elekt Muhendisligi Bolumu, Ankara, Turkey | en_US |
| dc.description.abstract | Hand-Sketched circuit recognition is a very useful tool in engineering area. Because most of the engineers prefer to design their circuits on the paper firstly. So, this can cause time wasting and some mistakes. In this study, which is based on the solving these kinds of problems, classification and recognition of the handwritten digital logic gates according to their complex and scalar FDs (Fourier Descriptors) is presented. Test results are obtained as 84.3 % accuracy rate for complex FDs, 98.6 % for scalar FDs. Then these results are compared and decided the optimum FDs type for this study. | en_US |
| dc.description.woscitationindex | Conference Proceedings Citation Index - Science | |
| dc.identifier.citationcount | 1 | |
| dc.identifier.endpage | 1924 | en_US |
| dc.identifier.isbn | 9781467373869 | |
| dc.identifier.issn | 2165-0608 | |
| dc.identifier.startpage | 1921 | en_US |
| dc.identifier.uri | https://hdl.handle.net/20.500.14411/9022 | |
| dc.identifier.wos | WOS:000380500900459 | |
| dc.institutionauthor | Tora, Hakan | |
| dc.language.iso | tr | en_US |
| dc.publisher | Ieee | en_US |
| dc.relation.ispartof | 23nd Signal Processing and Communications Applications Conference (SIU) -- MAY 16-19, 2015 -- Inonu Univ, Malatya, TURKEY | en_US |
| dc.relation.ispartofseries | Signal Processing and Communications Applications Conference | |
| dc.relation.publicationcategory | Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı | en_US |
| dc.rights | info:eu-repo/semantics/closedAccess | en_US |
| dc.subject | Fourier Descriptors | en_US |
| dc.subject | image processing | en_US |
| dc.subject | object recognition | en_US |
| dc.subject | boundaries of objects | en_US |
| dc.title | Recognition of Hand-Sketched Digital Logic Gates | en_US |
| dc.type | Conference Object | en_US |
| dc.wos.citedbyCount | 1 | |
| dspace.entity.type | Publication | |
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