Karaman, Mehmet

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K., Mehmet
Karaman, Mehmet
M.,Karaman
Mehmet, Karaman
M., Karaman
K.,Mehmet
Karaman,M.
Karaman, M.
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Araştırma Görevlisi
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Scholarly Output

2

Articles

2

Citation Count

56

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0

Scholarly Output Search Results

Now showing 1 - 2 of 2
  • Article
    Citation Count: 9
    Low temperature crystallization of amorphous silicon by gold nanoparticle
    (Elsevier, 2013) Karaman, Mehmet; Aydın, Merve; Sedani, S. H.; Erturk, K.; Turan, R.; Department of Basic English (Prep School); Physics Group
    Single crystalline Si thin film fabricated on glass substrate by a process called Solid Phase Crystallization (SPC) is highly desirable for the development of high efficiency and low cost thin film solar cells. However, the use of ordinary soda lime glass requires process temperatures higher than 600 degrees C. Crystallization of Si film at around this temperature takes place in extremely long time exceeding 20 h in most cases. In order to reduce this long process time, new crystallization techniques such as Metal Induced Crystallization (MIC) using thin metal films as a catalyst layer is attracting much attention. Instead of using continuous metal films, the use of metal nanoparticles offers some advantages. In this work, gold thin films were deposited on aluminum doped zinc oxide (AZO) coated glass and then annealed for nanoparticle formation. Amorphous silicon was then deposited by e-beam evaporation onto metal nanoparticles. Silicon films were annealed for crystallization at different temperatures between 500 degrees C and 600 degrees C. We showed that the crystallization occurs at lower temperatures and with higher rates with the inclusion of gold nanoparticles (AuNP). Raman and XRD results indicate that the crystallization starts at temperatures as low as 500 degrees C and an annealing at 600 degrees C for a short process time provides sufficiently good crystallinity. (c) 2013 Elsevier B.V. All rights reserved.
  • Article
    Citation Count: 47
    Forward and reverse bias current-voltage characteristics of Au/n-Si Schottky barrier diodes with and without SnO2 insulator layer
    (Elsevier, 2011) Aydemir, Ümran; Altindal, S.; Karaman, Mehmet; Aydemir, U.; Chemical Engineering; Physics Group
    The effects of interfacial insulator layer, interface states (N-ss) and series resistance (R-s) on the electrical characteristics of Au/n-Si structures have been investigated using forward and reverse bias current-voltage (I-V) characteristics at room temperature. Therefore, Au/n-Si Schottky barrier diodes (SBDs) were fabricated as SBDs with and without insulator SnO2 layer to explain the effect of insulator layer on main electrical parameters. The values of ideality factor (n), R-s and barrier height (Phi(Bo)) were calculated from ln(I) vs. V plots and Cheung methods. The energy density distribution profile of the interface states was obtained from the forward bias I-V data by taking bias dependence of ideality factor, effective barrier height (Phi(e)) and R-s into account for MS and MIS SBDs. It was found that N-ss values increase from at about mid-gap energy of Si to bottom of conductance band edge of both SBDs and the MIS SBD's N-ss values are 5-10 times lower than those of MS SBD's. An apparent exponential increase from the mid-gap towards the bottom of conductance band is observed for both SBDs' (MS and MIS) interface states obtained without taking R-s into account. (C) 2011 Elsevier B.V. All rights reserved.