Browsing by Author "Ozbek,M.E."

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Citation - Scopus: 20
Design and Development of a Remote and Virtual Environment for Experimental Training in Electrical and Electronics Engineering
(2010) Kara,A.; Aydin,E.; Ozbek,M.E.; Cagiltay,N.; Department of Electrical & Electronics Engineering; Software Engineering
European Remote Radio Laboratory (ERRL) has been developed by the support of European Commission. It intends to provide remote access to high cost devices remotely, and perform experiments in radio frequency (RF), communications and microwave domains of Electrical ad Electronics Engineering. The system has been operational for two years, and been integrated into curriculum of some courses. In this work, the hardware and software structures of the system are presented. Then, experimental content and the motivations in the design of the system are discussed. ©2010 IEEE.
Packet Header Classification for Network Intrusion Detection System Based on Fpga
(Institute of Electrical and Electronics Engineers Inc., 2022) Dakhil,Y.H.; Ozbek,M.E.; Al-Kaseem,B.R.; Department of Electrical & Electronics Engineering
Network security is becoming a key problem in data communication via the Internet. Classifying the incoming packets on network devices is one of the ways that increases network se-curity. Packet header classification is a major strategy for secure networking and connectivity. An intrusion detection system (IDS) is necessary for network devices to protect the network's traffic. Packet classification is a mechanism used by Internet services and security tools to examine each incoming packet against predetermined rules. This paper introduces a new algorithm for packet header classification based on a field-programmable gate array (FPGA) using the finite state machine (FSM) technique. The introduced algorithm compares each header field of an incoming packet to a predefined rule stored in a block read-only memory (ROM) of the FPGA chip to identify matches and then executes certain snort rules to classify them. The selected FPGA platform in this work exhibited high processing speed, particularly in digital system design. The presented algorithm was written using Verilog programming language and executed in Xilinx Vivado 18.2 software. The final program was uploaded to the Artix-7 FPGA development board. The simulation results demonstrated that the developed algorithm successfully classified the incoming packets as required with a maximum throughput that reached 100 Mbps. © 2022 IEEE.
Piezoelectric Driver Finds Buzzer's Resonant Frequency
(2008) Ozbek,M.E.; Department of Electrical & Electronics Engineering
[No abstract available]
Power-Saving Keypad Controls Multiple Keys Through One Mcu Pin
(2007) Ozbek,M.E.; Department of Electrical & Electronics Engineering
Power-saving Keypad controls multiple keys using bidirectional I/O pin on the microcontroller with resistors and a capacitor. The keypad can save power by charging the capacitor only once for each key press. The microcontroller enters sleep mode and remains asleep until the key is released and the state of I/O changes back to high. It also has the capability to determine the charging time with regulated voltage. The microcontroller starts functioning when a change in I/O's state generates an interrupt. The capacitors also starts charging to the High-state voltage with the changing I/O.